Events and Sightings
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Events and Sightings

PC-1 Parametron Computer: 50th anniversary

A seminar, and reception, to commemorate the 50th anniversary of the PC-1 parametron computer’s birth were held at the Internet Initiative Japan Inc. (IIJ) on 26 March 2008. These events were organized by the IIJ’s Eiiti Wada, professor emeritus of the University of Tokyo, and by the parametron computer anniversary committee. The PC-1 began operation on the afternoon of 26 March 1958.

The PC-1 (Parametron Computer 1) was designed and built at professor Hidetoshi Takahashi’s laboratory at the University of Tokyo. Eiichi Goto originated the parametron concept in 1954 while he was a graduate student working in Takahashi’s laboratory. The PC-1 is a binary computer featuring 4,200 parametrons for logic circuits and 256 words (36 bits/word) of core memory driven by two sinusoidal wave currents. The parametron is a majority logic element using parameter excitation—that is, the oscillation phases of the logic circuits settle in one of two stable states (see Figure 1).

At the beginning of the commemorative seminar at IIJ, Hiroshi Komiyama, president of the University of Tokyo, and Hideyuki Nakashima, vice president of the Information Processing Society of Japan and president of Future University-Hakodate, gave congratulation messages. Maurice Wilkes also sent—by email, a copy of which was displayed on-screen at the seminar—a congratulatory message acknowledging the 50th anniversary. Donald Knuth had also sent a congratulatory message but it had not yet arrived, as it had been sent by regular mail.

The session moderator was Haruhisa Ishida of Cyber University, professor emeritus of the University of Tokyo. Ishida had participated in the research at Takahashi Laboratory of the Goto-pair, an ultra-high-speed logic element consisting of tunnel diodes connected in series. Eiiti Wada presented the PC-1’s history at the Takahashi Laboratory, including the PC-1’s research and development. Wada had written an initial order R0 for the PC-1. His design—very short and sophisticated—was used for many years.

Figure 1. Parametrons used for the PC-1. (Courtesy of Nobuo Takahashi)
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Figure 1.

Parametrons used for the PC-1. (Courtesy of Nobuo Takahashi)

Former Takahashi Laboratory staff Keisuke Nakagawa, Takashi Soma, and Yoshihiro Ishibashi introduced the history of parametrons, the PC-1 hardware, and the PC-1 software respectively. Mitsuo Tasumi, former president of Saitama University and professor emeritus of the University of Tokyo, presented his experience using the PC-1 for his chemistry research and thanked the Takahashi lab staff accordingly. At that time (1958), the PC-1 was the only available computer at the University of Tokyo. Finally, Kenichi Miura of the National Institute of Informatics introduced John von Neumann’s parametron patents, which he had registered in the US during the 1950s.

After the seminar, Wada opened the reception at the Gakushikaikan hall in Tokyo. Iwao Toda, who participated in developing the MUSASINO-1 parametron computer at NTT (Nippon Telegraph and Telephone) in the late 1950s, delivered a congratulatory message. After the toast, all attendees enjoyed conversation and refreshments, and expressed hopes to meet again at the 100th anniversary.

Osaka University: Exhibit of 1950s computer

Osaka University’s Museum of Science and Technology opened in August 2007 in Toyonaka City, Osaka, Japan. One of the permanent exhibits is the ENIAC-based decimal arithmetic unit and a binary vacuum tube computer (see Figure 2). Both had been built in professor Kenzo Jo’s laboratory at Osaka University in the 1950s.

Research and development of electronic computers in Japan, of course, started after World War II. At that time, Jo had read the article about ENIAC in Newsweek (February 1946), and in his laboratory, Saburo Makinouchi and Hiroshi Yasui began experiments with electronic counters using vacuum tubes. They built a decimal four-digit arithmetic unit based on the ENIAC circuits in 1950. This was the first digital arithmetic unit developed in Japan.

Later, in 1953, Jo and his colleagues researched binary stored-program computers and started the development of an EDSAC-type electronic computer. This machine used about 1,500 vacuum tubes and 4,000 diodes for logic circuits, and 32 glass solid delay line elements with [End Page 74...